As “junction points” present at all voltage levels and carrying energy in electric power systems, power substation buses are critical to system topology. Exposure to high fault currents imposes stringent performance requirements on both bus protection relays and current transformers.
Saturation of current transformers (CTs) during external faults may jeopardize the security of bus protection due to unbalanced currents in the differential relay.
Misoperation of a bus relay, in turn, considerably changes system topology and significantly impacts both power delivery in the case of a distribution bus, and system stability in the case of a transmission-level bus.
Historically, Pacific Gas and Electric Company (PG&E) has standardized on the double-bus single-breaker arrangement for major transmission buses (Figure 1).
The standard protection scheme for these buses has been a high impedance bus differential relay. The single breaker double bus configuration required complex switching of the bus differential CT, dc tripping circuits and breaker failure tripping circuits whenever the bus configuration was changed by operating the bus isolator switches.
Operations personnel were often required to execute more than 100 switching steps to reconfigure the bus to take one breaker out of service by bypassing and clearing it while maintaining protection of the circuit using a substitute breaker.
Low-impedance microprocessor-based bus protection systems have provided a better solution to protecting the double-bus single breaker bus configuration.
Such systems monitor all currents and positions of breakers and isolators, and dynamically adjust their zones of protection for optimum selectivity while the bus is being switched.
|Title:||Commissioning and Testing Complex Busbar Protection Schemes – Experience at Pacific Gas & Electric – Lubomir Sevov, Bogdan Kasztenny and Ed Taylor|
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