Controllers in RTUs
RTUs (remote terminal units) are now made from small computers. Shortly after this began, controller algorithms were programmed into the RTU. Flow totalizers, power factor calculators, and logic solvers soon followed.
Any function that can be described by a mathematical formula, or algorithm, can be solved by the computer in a sufficiently complex RTU. The signals are gathered from field sensing devices. The algorithms are solved. Control instructions are sent out to valves or other control actuators.
This happens very fast, in the order of milliseconds or less, and then the RTU does it all again. Scan periods in RTUs are very short.
Certain safety-related functions, like fire or smoke detection and toxic gas concentration, are solved in dedicated hardware. It is not because they have technically difficult algorithms, but because the regulatory agencies that certify them require them to be standalone devices.
This unit has concentrated on some of the considerations to be kept in mind when applying sensors and actuators. As used in SCADA, these devices may not be significantly different from the instruments that fulfill similar functions in any highly automated plant in a similar industry.
However, they will be different from instruments that are designed to be read directly by a human operator.
SCADA sensors and actuators tend to be expensive to buy and to maintain, a fact that should be taken into account when you develop cost estimates for SCADA installations.
Before the control algorithm can be solved, the information gathered by the field sensor must be delivered as an input to the controller or RTU. Some communication must happen between the sensor and the RTU. Then, after the algorithm is solved, some communication must happen between the RTU and the actuator.
Analog to Binary to Digital
All data moved between the master terminal unit (MTU) and the RTUs is binary data. It may have originated as binary data as the status condition of an on-off switch or it may have been converted to binary form from analog form.
Figure 1 shows the output from a limit switch that may be used to indicate the state of a valve.
In Figure 1(a), the valve is open and the switch output is a steady +5 VDC. In Figure 1(b), the valve is closed and the switch output is a steady 0 VDC.
The bottom part of Figure 1 shows a switch output for a valve that is open, then closed, then open, and so on.
Figure 2 shows how the switch output from a valve is changed to a bit. The word bit stands for binary digit. A single-bit register, or flip-flop, is shown in Figure 2(a). The valve status switch output is fed to the enable input of the register, and the register binary output signal comes out of the register.
A continuous series of pulses, called the ‘clock’, is fed into another input of the register.
Figure 2(b) shows the timing of the logic. Shortly before time = 1, the valve opens and the valve status switch output moves from 0 volts to +5 volts. At time = 1, the clock pulse goes positive (from 0 volts to +5 volts) and this, combined with +5 volts on the enable input of the register, causes the register to output a “1” (see bottom line of Figure 2(b).
The valve stays open for several clock periods and closes after time = 3. When it does, the enable signal goes to 0 volts, but this does not change the register output. When the clock goes positive at time = 4, the register output changes to a “0”.
Figure 6-9 shows how an analog signal is developed to represent a valve position. When the valve stem rises to its fully open position, the transmitter output will be +5.000 volts.
When the valve is fully closed, the output will be 0.000 volts. As shown in Figure 2 above, the output is at some value between 0 and 5 volts. Let us assume that it is +3.000 volts.
The largest bit is usually called the most significant bit or ‘MSB’. The smallest bit is the least significant bit or ‘LSB’. The MSB is one half of the value of the full-scale amount. Each succeeding bit is one half the value of the previous bit.
How it works?
Starting at the top left of Figure 4, the +3.000 volt signal is fed to the first stage of the ADC. The converter tries to subtract 2.500 volts from it. It can (because 3.000 is larger than 2.500) so it outputs a +5 volt signal to the enable input of 2.500 volt bit (MSB – Most Significant Bit) of the register.
The next clock pulse forces the register MSB to output a “1”.
The remainder (3.000 – 2.500 = 0.500 volts) is fed to the second stage. The converter tries to subtract 1.250 volts from it. It cannot (because 0.500 is smaller than 1.250) so it outputs a 0 volt signal to the enable input of the 1.250 volt bit of the register.
The next clock pulse forces that register bit to a “0”.
The remainder (still 0.500 volts) is fed to the third stage. The converter tries to subtract 0.625 volts from it. It cannot (because 0.500 is smaller than 0.625) so it outputs a 0 volt signal to the enable input of the 0.625 volt bit of the register.
The next clock pulse forces that register bit to a “0”. The remainder (still 0.500 volts) is fed to the fourth stage. The converter tries to subtract 0.3125 volts from it. It can, so it outputs a +5 volt signal to the enable input of the LSB of the register. The next clock pulse forces that register bit to a “1”.
The result is a four-bit binary word that describes the 3.000 volts as follows:
|MSB 1 x 2.500 volts||=||2.500 volts|
|+0 x 1.250 volts||=||0 volts|
|+0 x 0.625 volts||=||0 volts|
|+LSB 1 x 0.3125 volts||=||0.3125 volts|
Because a four-bit register provides precision of 1 in 24, or 1 in 16, this is as close as we can get to 3.000 volts. For some applications, the signal will vary from positive to negative, using up one additional bit. Additional bits would provide additional precision.
The accuracy of analog-to-digital converters is sometimes defined in terms of plus or minus one-half of the least significant bit (LSB).
Digital-to-analog converters (DACs) are devices that take a digital signal and convert it to an analog value. Figure 5 shows how this can be done.
Using the digital value established by the ADC in Figure 4, we feed the most significant bit into the enable port of the top flip flop, the second most significant bit into
the enable port of the second flip flop, and so on. When the clock pulse triggers each of these flip flops, 5 volts will appear at the output of each flip flop that had a “1” on its input.
The other input is the switching signal. If it is 5 volts, the precise voltage will pass through. If it is 0 volts, the precise voltage will not pass. The largest voltage is one half of the full scale of the DAC.
The second voltage is exactly one half of the first, and so on. The adder block on the right adds each of its inputs and then outputs a result that is the sum of the inputs. In this case, the output will add 2.500 volts plus 0.3125 volts to output 2.8125 volts.
Reference // SCADA supervisory control and data acquisition by Stuart A. Boyer (Purchase hardcopy from Amazon)